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MAX1651CSA
+物料清單IC REG CTRLR BUCK 8SOIC
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製造商類比設備股份有限公司/Maxim集成
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製造商部分 #MAX1651CSA
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有存貨2542
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規格
| 屬性 | 價值 |
| Supplier | Rochester Electronics, LLC,Analog Devices Inc./Maxim Integrated |
| Package | Tube,Tube |
| ProductStatus | Obsolete |
| OutputType | Transistor Driver |
| Function | Step-Down |
| OutputConfiguration | Positive |
| Topology | Buck |
| NumberofOutputs | 1 |
| OutputPhases | 1 |
| Voltage-Supply(Vcc/Vdd) | 3V ~ 16V |
| Frequency-Switching | Up to 300kHz |
| DutyCycle(Max) | 96.5% |
| SynchronousRectifier | No |
| ClockSync | No |
| ControlFeatures | Enable |
| OperatingTemperature | 0°C ~ 70°C (TA) |
| MountingType | Surface Mount |
| Package/Case | 8-SOIC (0.154, 3.90mm Width) |
概述
Description
Key features
- Programmable current limit via sense resistor
- Programmable soft‑start to tame inrush
- Undervoltage lockout (UVLO)
- Overcurrent protection (latch or hiccup)
- Overvoltage protection and thermal shutdown
- Fault/STATUS signals (open‑drain outputs)
- Enable input and wide operating range for power rails
Typical applications
- Server backplanes, telecom power rails, and other systems needing safe plug‑in protection for live supplies.
Note: The CSA suffix denotes a specific package/temperature grade variant of the MAX1651 family; check the datasheet for exact package and electrical details.
Pinout
- Function: PWM controller for a switching regulator (buck) – provides fixed-frequency, current‑mode control with protections (UVLO, soft-start, etc.) and drives external power transistors to regulate output voltage.
Manufacturer
Company type: A fabless semiconductor company that designs and markets analog and mixed-signal integrated circuits (now part of Analog Devices).
Application
- Hot‑swap protection for servers, telecom gear, and data‑storage PSUs
- Redundant/ORing backplanes and high‑availability power supplies
- DC‑DC input protection stages and fault isolation
- Power sequencing, monitoring, and protection in data centers and industrial equipment
Used to safely insert/remove power rails and provide current limit and fault signaling in complex power architectures.