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CD4013BF3A
+物料清單IC FF D-TYPE DOUBLE 1BIT 14CDIP
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製造商部分 #CD4013BF3A
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規格
| 屬性 | 價值 |
| Series | 4000B |
| Part Status | Active |
| Function | Set(Preset) and Reset |
| Type | D-Type |
| Output Type | Complementary |
| Number of Elements | 2 |
| Number of Bits per Element | 1 |
| Clock Frequency | 24 MHz |
| Max Propagation Delay @ V, Max CL | 90ns @ 15V, 50pF |
| Trigger Type | Positive Edge |
| Current - Output High, Low | 6.8mA, 6.8mA |
| Voltage - Supply | 3V ~ 18V |
| Current - Quiescent (Iq) | 20 µA |
| Operating Temperature | -55°C ~ 125°C (TA) |
| Mounting Type | Through Hole |
| Supplier Device Package | 14-CDIP |
| Package / Case | 14-CDIP (0.300", 7.62mm) |
| Input Capacitance | 5 pF |
概述
Description
Equivalent
1. CD4013BE (Texas Instruments)
2. HEF4013BP (NXP)
3. MC14013BCP (ON Semiconductor)
4. TC4013BP (Toshiba)
5. HCF4013BEY (STMicroelectronics)
These ICs share similar functionality, pin configuration, and are typically used in digital circuits for data storage, data transfer, and other logic functions. Always refer to the datasheets for specific electrical characteristics and compatibility.
Features
1. Dual Flip-Flops: Contains two flip-flops in a single package.
2. Data Storage: Can store a single bit of data per flip-flop.
3. Set and Reset Functionality: Independent set and reset inputs allow for asynchronous control over the output states.
4. Clock Input: Edge-triggered on the positive transition of the clock signal.
5. Logic Compatibility: Compatible with standard CMOS and TTL logic levels.
6. Wide Supply Voltage Range: Operates over a wide power supply range, typically from 3V to 15V.
7. Low Power Consumption: CMOS technology ensures low power usage.
8. High Noise Immunity: Offers robustness against noise, which enhances reliability in digital circuits.
These features make the CD4013BF3A suitable for applications requiring data storage, frequency division, and state memory functions.
Pinout
- Pins for each flip-flop:
- D (Data) Input: This pin is used to input the data that is to be stored.
- Clock (CLK) Input: The flip-flop captures the input data on the rising edge of the clock signal.
- Set (SET) and Reset (RESET) Inputs: These pins are used to set or reset the flip-flop asynchronously.
- Q and !Q (Q-bar) Outputs: These pins provide the output and its inverse.
- Total Pin Count: The CD4013 typically comes in a 14-pin dual in-line package (DIP).
This IC is commonly used in applications requiring data storage, data transfer, frequency division, and simple state machine building. It operates over a wide range of voltages, which makes it versatile for various digital logic applications.