規格
| 屬性 | 價值 |
| Supplier | Alliance Memory, Inc. |
| Package / Case | Tray |
| Part Status | Obsolete |
| Memory Type | Volatile |
| Memory Format | DRAM |
| Technology | SDRAM - DDR3L |
| Memory Size | 2Gb (128M x 16) |
| Memory Interface | Parallel |
| Clock Frequency | 800 MHz |
| Write Cycle Time - Word Page | 15ns |
| Access Time | 20 ns |
| Voltage - Supply | 1.283V ~ 1.45V |
| Operating Temperature | -40°C ~ 95°C (TC) |
| Mounting Type | Surface Mount |
概述
Description
Equivalent
Do you want exact cross-reference numbers? If yes, specify preferred vendors (e.g., Samsung, Hynix, Micron) or region. Otherwise, equivalence is: 2Gb (256MB) DDR3L SDRAM, x16, 1.35V, DDR3L-1333, -12BIN. Major vendor equivalents are 2Gb x16 DDR3L parts from Samsung, Hynix, and Micron; I can provide precise cross-references once you name suppliers.
Features
AS4C128M16D3LB-12BIN is a DDR3L SDRAM device with the following typical features:
- Type/organization: DDR3L SDRAM, 128M × 16 (2 Gbit total) density
- Voltage: VDD/VDDQ ≈ 1.35V (DDR3L), VPP ≈ 2.5V
- Speed grade: -12BIN (board/controller dependent; generally supports DDR3L-1066/1333 MT/s)
- Architecture: 8 banks; pipelined, multi-bank operation; Burst Length 4/8
- Power/efficiency: low-voltage operation with features for power-down modes
- Refresh and reliability: Auto Refresh, Self-Refresh, Partial Array Self-Refresh (PASR), Deep Power-Down
- I/O features: On-die termination (ODT), ZQ calibration for impedance matching
- Packaging: Pb-free, LBGA/FBGA-style package (compact, suitable for mobile/embedded use)
Note: exact timing parameters (CL, tRCD, tRP) and supported MT/s can vary with the system controller and board design; consult the official datasheet for precise specs.
- Type/organization: DDR3L SDRAM, 128M × 16 (2 Gbit total) density
- Voltage: VDD/VDDQ ≈ 1.35V (DDR3L), VPP ≈ 2.5V
- Speed grade: -12BIN (board/controller dependent; generally supports DDR3L-1066/1333 MT/s)
- Architecture: 8 banks; pipelined, multi-bank operation; Burst Length 4/8
- Power/efficiency: low-voltage operation with features for power-down modes
- Refresh and reliability: Auto Refresh, Self-Refresh, Partial Array Self-Refresh (PASR), Deep Power-Down
- I/O features: On-die termination (ODT), ZQ calibration for impedance matching
- Packaging: Pb-free, LBGA/FBGA-style package (compact, suitable for mobile/embedded use)
Note: exact timing parameters (CL, tRCD, tRP) and supported MT/s can vary with the system controller and board design; consult the official datasheet for precise specs.
Pinout
- Pin count: 48 pins
- Function: 128M × 16-bit low-power synchronous DRAM (SDRAM) memory device (LB package).
- Function: 128M × 16-bit low-power synchronous DRAM (SDRAM) memory device (LB package).
Manufacturer
- Manufacturer: Alliance Memory, Inc.
- What kind of company: A US-based semiconductor company that designs and markets DRAM memory products (a fabless memory IC company).
- What kind of company: A US-based semiconductor company that designs and markets DRAM memory products (a fabless memory IC company).
Application
AS4C128M16D3LB-12BIN is a DDR3L SDRAM (128M × 16, 2 Gbit) in low-voltage operation. Typical application areas include:
- Embedded systems and single-board computers
- Industrial automation and control panels
- Automotive infotainment and instrument clusters
- Networking/telecom equipment (routers, switches)
- Consumer electronics (set‑top boxes, smart TVs, media players)
- FPGA/ASIC memory interfaces and buffer RAM
These are common uses for DDR3L memory of this density and package.
- Embedded systems and single-board computers
- Industrial automation and control panels
- Automotive infotainment and instrument clusters
- Networking/telecom equipment (routers, switches)
- Consumer electronics (set‑top boxes, smart TVs, media players)
- FPGA/ASIC memory interfaces and buffer RAM
These are common uses for DDR3L memory of this density and package.
Package
LBGA (Leadless Ball Grid Array) package.
