Part A
AD9779ABSVZ
ADI公司
- Lifecycle
- Active
- Stock
- 2155 件
- Package
- TQFP-100
- Series
- 資料獲取-數模轉換器（DAC）
Replacement verdict
Compatible functional replacement candidate
The AD9779ABSVZ and AD9773BSV are both dual-channel 12-bit high-speed DACs from Analog Devices in the same 100-lead TQFP-EP package, sharing a common functional architecture and interface family. However, the AD9779ABSVZ offers a significantly higher maximum update rate and wider supply range, so the AD9773BSV can serve as a functional substitute only in applications where the lower sample rate and narrower supply headroom are acceptable. Designers should validate clocking, output filtering, and thermal performance before adopting the AD9773BSV as a replacement.
Resolution and Channel Count
High match
Package Type
High match
Maximum Update Rate
Validation required
Supply Voltage Range
Validation required
Key differences
Rows are prioritized by design impact. Highlighted values require attention during substitution.
Key electrical and mechanical differences between the two devices
| Parameter | AD9779ABSVZ | AD9773BSV | Why it matters |
|---|---|---|---|
| Resolution (DAC bits) | 16 bit | 12 bit | Higher resolution provides finer output quantization and lower quantization noise, directly affecting signal fidelity and SFDR. |
| Number of DAC Channels | 2 (dual) | 2 (dual) | Both are dual-channel DACs, so channel count is compatible for I/Q transmit architectures. |
| Maximum Update Rate | 1000 MSPS | 400 MSPS | Higher update rate enables wider signal bandwidths and higher intermediate frequencies, affecting achievable transmit frequency planning. |
| Maximum Input Data Rate | 500 MSPS | 160 MSPS | Determines the maximum baseband sample rate the digital input interface can accept, limiting overall signal bandwidth. |
| Interpolation Factor | 2x, 4x, 8x | 2x, 4x, 8x | Interpolation filters relax analog reconstruction filter requirements; matching factors ease drop-in replacement in the signal chain. |
| Digital Interface | LVDS | CMOS | Interface type affects board layout, pin count, and achievable data rates; LVDS supports higher speeds than CMOS. |
| Supply Voltage | 3.3 V (analog/digital), 1.8 V (digital core) | 3.3 V | Supply rail requirements affect power supply design and compatibility with existing board power domains. |
| Package | 100-lead TQFP (SVZ) | 80-lead TQFP (SV) | Different package footprints and pin counts prevent direct PCB drop-in substitution without layout changes. |
| Operating Temperature Range | -40 °C to +85 °C | -40 °C to +85 °C | Identical industrial temperature range means both suit the same environmental conditions. |
Need help validating a replacement?
Send your BOM and application constraints for technical and sourcing review.
Full specification comparison
Use manufacturer datasheets as the final authority.
| Specification | AD9779ABSVZ | AD9773BSV |
|---|---|---|
| Supplier | - | Rochester Electronics, LLC |
| Series | - | TxDAC® |
| Part Status | Active | Obsolete |
| Number of Bits | 16 | - |
| Number of D/A Converters | 2 | - |
| Output Type | Current - Unbuffered | - |
| Differential Output | Yes | - |
| Data Interface | Parallel | - |
| Reference Type | Internal | - |
| Voltage - Supply, Analog | 3.13V ~ 3.47V | - |
| Voltage - Supply, Digital | 1.7V ~ 2.05V, 3.13V ~ 3.47V | - |
| INL / DNL(LSB) | ±6, ±2.1 | - |
| Architecture | Oversampling Interpolating DAC | - |
| Operating Temperature | -40°C ~ 85°C | - |
Frequently asked questions
What are the key differences between the AD9779ABSVZ and the AD9773BSV?
The AD9779ABSVZ is a dual-channel, 16-bit, 1 GSPS digital-to-analog converter (DAC) with an on-chip 2x/4x/8x interpolating filter and a serial LVDS interface. The AD9773BSV is a dual-channel, 12-bit, 400 MSPS DAC with 2x/4x/8x interpolation and a parallel CMOS input interface. The AD9779A offers higher resolution (16-bit vs 12-bit), a higher maximum update rate (1 GSPS vs 400 MSPS), and a serial LVDS data interface, while the AD9773 uses a parallel CMOS interface.
Are the AD9779ABSVZ and AD9773BSV pin-compatible or package-compatible?
No. The AD9779ABSVZ is supplied in a 100-lead TQFP_EP (exposed pad) package, while the AD9773BSV is supplied in a 80-lead LQFP package. The different lead counts, package footprints, and pin assignments mean they are not drop-in replacements and require different PCB land patterns.
Do both parts support the same interpolation ratios?
Yes. Both the AD9779ABSVZ and the AD9773BSV integrate selectable 2x, 4x, and 8x digital interpolation filters, allowing the input data rate to be increased before conversion. This makes both devices suitable for transmit signal-path applications requiring digital upconversion filtering.
How do the input data interfaces of the two DACs differ?
The AD9779ABSVZ uses a serial LVDS input interface, which reduces pin count and supports high-speed data transfer at its 1 GSPS update rate. The AD9773BSV uses a parallel CMOS input interface, which requires more I/O pins but is simpler to interface with standard CMOS logic and FPGAs at its 400 MSPS rate.
What are the maximum DAC update rates of the AD9779ABSVZ and AD9773BSV?
The AD9779ABSVZ supports a maximum DAC update rate of 1 GSPS. The AD9773BSV supports a maximum DAC update rate of 400 MSPS. The higher update rate of the AD9779A enables wider signal bandwidths and higher intermediate frequency synthesis in the transmit path.
What is the resolution of each DAC?
The AD9779ABSVZ is a 16-bit dual DAC, providing finer amplitude quantization and lower quantization noise. The AD9773BSV is a 12-bit dual DAC. The 16-bit resolution of the AD9779A generally yields better spurious-free dynamic range (SFDR) and signal-to-noise ratio (SNR) performance for demanding transmit applications.
Can the AD9773BSV be used as a direct substitute for the AD9779ABSVZ in an existing design?
No. Because the two devices differ in resolution (12-bit vs 16-bit), maximum update rate (400 MSPS vs 1 GSPS), input interface (parallel CMOS vs serial LVDS), and package (80-lead LQFP vs 100-lead TQFP_EP), a direct substitution is not possible. Any replacement requires redesign of the data interface, PCB footprint, and validation of the signal chain against the target specifications.