AD7982BRMZ
ADI公司
- Lifecycle
- Active
- Stock
- 1856 件
- Package
- MSOP-10
- Series
- 資料獲取-模數轉換器(ADC)
對 AD7982BRMZ 和 AD7980BRMZRL7 的深入比較,為您帶來關於其規格和關鍵特性的寶貴見解。我們詳細介紹了重要因素,包括 RoHS 合規性、REACH 狀態、系列、安裝方式、封裝類型以及其他相關特性。並排展示差異,簡化了元件選擇,讓您更輕鬆地為您的特定應用選擇最佳方案。
Replacement verdict
The AD7980BRMZRL7 and AD7982BRMZ are both 18-bit successive-approximation ADCs from Analog Devices in the same 10-lead MSOP package, but they differ in sample rate, analog input architecture, and reference configuration. The AD7982BRMZ offers a higher throughput and true differential input, making it a viable functional upgrade candidate only after validating input drive, reference, and timing requirements against the target design.
ADI公司
ADI公司
Rows are prioritized by design impact. Highlighted values require attention during substitution.
Key electrical and mechanical differences between the two devices
| Parameter | AD7980BRMZRL7 | AD7982BRMZ | Why it matters |
|---|---|---|---|
| Resolution | 16 bits | 18 bits | Higher resolution provides finer quantization and lower quantization noise, directly affecting achievable dynamic range and measurement precision. |
| Sample Rate (max) | 1 MSPS | 1 MSPS | Maximum throughput determines the highest signal bandwidth that can be digitized without aliasing for a given application. |
| Input Type | Pseudo-differential (single-ended) | Fully differential | Fully differential inputs reject common-mode noise and improve distortion performance, while pseudo-differential inputs simplify single-ended signal interfacing. |
| SNR (typ) | 91.5 dB | 98 dB | Signal-to-noise ratio defines the usable dynamic range and the smallest signal that can be resolved above the noise floor. |
| INL (max) | ±1.0 LSB | ±2.5 LSB | Integral nonlinearity indicates deviation from an ideal transfer function and affects absolute accuracy of the conversion. |
| DNL (max) | ±0.9 LSB | ±0.99 LSB | Differential nonlinearity reflects code transition uniformity; excessive DNL can cause missing codes and degrade monotonicity. |
| Supply Voltage | 2.5 V (analog), 2.5 V to 5 V (digital I/O) | 5 V (analog), 2.5 V to 5 V (digital I/O) | Supply requirements determine power-rail compatibility and whether the part can drop into an existing board design without rail changes. |
| Power Consumption (typ) | 10 mW at 1 MSPS | 35 mW at 1 MSPS | Power dissipation affects thermal budget and is critical for portable and power-sensitive systems. |
| Package | 10-lead MSOP | 10-lead MSOP | Package footprint and pinout determine physical board compatibility and whether a direct drop-in replacement is possible. |
| Interface | SPI / QSPI / MICROWIRE / DSP compatible | SPI / QSPI / MICROWIRE / DSP compatible | Serial interface compatibility ensures the ADC can connect to the existing host controller without protocol changes. |
Send your BOM and application constraints for technical and sourcing review.
Use manufacturer datasheets as the final authority.
| Specification | AD7982BRMZ | AD7980BRMZRL7 |
|---|---|---|
| Series | PulSAR® | PulSAR® |
| Part Status | Active | Active |
| Number of Bits | 18 | 16 |
| Sampling Rate(Per Second) | 1M | 1M |
| Number of Inputs | 1 | 1 |
| Input Type | Differential | Pseudo-Differential |
| Data Interface | SPI, DSP | SPI, DSP |
| Configuration | S/H-ADC | S/H-ADC |
| Ratio - S / H: ADC | 1:1 | 1:1 |
| Number of A/D Converters | 1 | 1 |
| Architecture | SAR | SAR |
| Reference Type | External | External |
| Voltage - Supply, Analog | 2.375V ~ 2.625V | 2.375V ~ 2.625V |
| Voltage - Supply, Digital | 2.375V ~ 2.625V | 2.375V ~ 2.625V |
| Operating Temperature | -40°C ~ 85°C | -40°C ~ 125°C |
The AD7980BRMZRL7 is a 16-bit, 1 MSPS PulSAR ADC with a pseudo-differential input and a 2.5 V to 5 V single-supply span, while the AD7982BRMZ is an 18-bit, 1 MSPS PulSAR ADC with a fully differential input and a 5 V single supply. The AD7982 offers two additional bits of resolution and true differential input architecture, whereas the AD7980 provides a pseudo-differential input and operates over a wider single-supply range.
Both devices are offered in a 10-lead MSOP (RMZ) package with the same pin count, but they are not functionally interchangeable without design review. The AD7980 uses a pseudo-differential input configuration (IN+ and IN- with IN- typically tied to a reference level), while the AD7982 uses a true fully differential input pair. Pin functions and the required input drive circuitry differ, so the PCB and analog front end must be validated before substitution.
The AD7980BRMZRL7 provides 16-bit resolution at a maximum throughput of 1 MSPS. The AD7982BRMZ provides 18-bit resolution at a maximum throughput of 1 MSPS. Both are successive-approximation register (SAR) PulSAR ADCs from Analog Devices.
The AD7980BRMZRL7 has a pseudo-differential input: the IN+ input is sampled against IN-, which is typically driven by a reference or ground-level signal. The AD7982BRMZ has a fully differential input, where both IN+ and IN- are actively driven and the converter digitizes the difference between them, providing improved common-mode rejection and better performance with differential signal sources.
The AD7980BRMZRL7 operates from a single 2.5 V to 5 V supply (VDD) with a separate VIO logic supply. The AD7982BRMZ operates from a 5 V single supply with a separate VIO logic supply. Designs migrating between the two should verify that the analog supply rail and reference voltage meet the requirements of the target device.
Yes. Both the AD7980BRMZRL7 and the AD7982BRMZ use an SPI-compatible serial interface with a separate SDI, SDO, SCK, and CNV configuration, allowing them to interface with common digital hosts and DSPs. However, the digital host must be configured for the correct resolution (16-bit versus 18-bit) and timing when switching between the two devices.
No. Although both are 10-lead MSOP PulSAR ADCs with 1 MSPS throughput, the AD7980 is 16-bit with a pseudo-differential input, while the AD7982 is 18-bit with a fully differential input. The difference in resolution, input architecture, and supply requirements means the analog front end, reference, and digital interface timing must be re-validated before any substitution.